CS-01: Computer Fundamentals - Sample Papers

MCA (I Yr.)
Term-End Examination

Note :
Time: 3 hours
There are six questions in this paper. Question number 1 is compulsory and carries 30 marks. Answer any three from the rest.

June 1999

Question 1

(a) A hypothetical microprocessor generates a 16-bit address. The program counter and memory address register of the processor are 16 bits and the processor has 16-bit wide data bus. (6)

1. What is the maximum memory address space that processor can access directly if connected to a "16 bit memory"?
2. What is the maximum memory address space that processor can access directly if connected to a "8 bit memory"?
3. What architectural features will allow the microprocessor to access a separate "I/O Space"?
4. If an input and output instruction can specify an 8 bit port number, how many 8 bit I/O ports can microprocessor support?

(b) In virtually all systems that include DMA modules, DMA access to the main memory is given higher priority than CPU access to main memory. Why? Describe a DMA module with the help of block diagram. (6)

(c) A PC-relative mode branch instruction of a 16-bit instruction is stored in 16-bit memory at an address of 620 (decimal). The branch is made to location 530 (decimal). The address field in the instruction is 10 bits long. What is the binary value of the instruction? State the assumptions, if any. (3)

(d) If the last operation performed on a computer with an 8-bit word was an addition in which the operands were decimal values 2 and 3, then what would be the values of the following flags: (3)

1. Carry
2. Zero
3. Overflow
4. Sign
5. Even parity
6. Half-carry

(e) What is instruction pipelining? What are the problems associated with it? How is instruction pipelining used in Reduced Instruction Set Computers? (6)

(f) Write a program in 8086 assembly language for interchanging the nibbles of a byte and outputting them in hexadecimal notation. (6)

Question 2

A combinational circuit is used to control a 7 segment display of decimal digits (please refer to the diagram). The circuit has four inputs, which provide 4-bit binary coded decimal code input to the circuit. The seven outputs define which segments will be activated to display the given decimal digit. Design the combinational circuit and draw the resultant logic diagram. (15)

Question 3

(a) Explain the steps involved for writing an Interrupt Service Routine for 8086 microprocessor? What is meant by memory resident program? How do you make memory resident assembly programs in 8086 microprocessor? (5)

(b) Write an assembly program in 8086 assembly language to reverse a string of 8 bytes without using a stack. (5)

(c) Write an assembly program in 8086 assembly language for adding two packed BCD numbers followed by multiplication by digit 2. (5)

Question 4

(a) What is data flow machine? What are the advantages and disadvantages of a data flow machine? (3)

(b) What is meant by bus arbitration? Why is it needed in multiprocessor systems? (2)

(c) Compare and contrast the following: (5)

• Attached array processors Vs associative array processors.
• Multiprocessors with crossbar switch Vs multiprocessors with multiport memory

(d) What is the principle of single error correction - double error detection code? What will be the size of such code for 8 bit data? (5)

Question 5

(a) Write short notes on the following: (10)

1. Interrupt vector table in 8086 microprocessor
2. Microinstruction
3. Problems for software development for parallel organisation
4. Interleaved memory
5. Arithmetic co-processor

(b) What is Cache coherence problem? Explain in the context of uniprocessor and multiprocessor systems. How can this problem be solved? (5)

Question 6

(a) Design a floating-point representation for the following number ranges: (5)

Maximum number = 1 * 1010
Minimum number = -1 * 1010
The base of representation = 2
Zero needs to represented by this format.

(b) Describe the following terms: (10)

1. Wilkes control.
2. Evaluation stack architecture
3. Static, dynamic and flash memories
4. Micro-instruction execution
5. Variable length instructions